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mlx80002/mlx80004 enhanced universal dual/quad lin transceiver datasheet revision 021 C sept 2016 page 1 of 38 1. features and benefits ? lin 2.x/sae j2602 and iso17987 - 4 compliant ? quad/dual - enhanced master transceiver function for each channel ? backward compatible to quad - channel master transceiver mlx80001 ? lowest space (qfn4x4, wettable flanks) and minimized external components ? quad/dual versions with same package and foot print for cost/space optimized design ? slew rate selection and high speed flash mo de ? wide o perating voltage range v s = 5 to 27 v ? fully compatible to 3.3v and 5v devices ? very low standby current consumption of (typ) 10 a in sleep mode ? wake input for local wake - up capability ? remote and local wake - up source recognition ? control output inh for external components ? integrated termination (resistor & decoupling diode) for both lin master & slave nodes ? txd dominant time out function in slave configuration ? rxd dominant time out function in master configuration ? sleep timer ? low eme (emission) an d high emi (immunity) level ? high impedance lin p in in case of loss of ground or battery ? enhanced esd robustness o +/ - 10kv according to iec 61000 - 4 - 2 for pins lin, vs and wake 2. ordering information product code temperature code package code option code packing form code mlx80002 k lw c aa - 001 re mlx80004 k lw b aa - 001 re legend : temperature code: k = - 40 to 125 c package code: l w = quad flat package (qfn) , wettable flanks option code: b aa - 00 1 = design revision packing form: re = reel ordering example: mlx 80004 klw - b aa - 001 - re
mlx80002/mlx80004 enhanced universal dual/quad lin transceiver datasheet revision 021 C sept 2016 page 2 of 38 3. general description the mlx80004(2) is a quad/dual lin transceiver physical layer device for a single wire data link capable of operating in applications using baud rates up to 20kbd. it is compliant to lin2.x as well as to the sae j2602 specifications. the ic furthermore can be used in iso9141 systems. the mlx80004 is functionally compatible to the mlx80001 quad master lin transceiver. the device is flexi ble for use in lin C master applications and slave applications as well. due to the integrated master termination and the high esd/emc robustness of the device a minimum space and number of external components is required. the number of lin C channels can be easily adapted on the application requirements by combinations of quad and dual channel devices within the same foot print. because of the very low power consumption of the mlx80004 while being in sleep mode its suitable for ecu applications with har d standby current requirements. the implemented high resistive lin - termination in sleep mode as well as the rxd dominant time - out feature allows a comfortable handling of lin short circuits to gnd. in order to reduce the power consumption in case of failure modes, the integrated sleep timer takes care for switching the ic into the most power saving sleep mode after power - on or wake - up events are not followed by a mode change response of the microcontroller. the mlx80004/2 has an improved emi performa nce and esd robustness according to the oem common hardware requirements for lin in automotive applications rev.1.2. by using the mode0/1 pins the application can be easily adapted on the required baud rate in order to optimize the emc emissions. a high s peed flash mode with disabled slew rate control is available as well. to fulfill different oem requirements, the integrated master termination can be disabled and external master resistors and decoupling diodes can be used. in this mode the mlx80004/2 can be used in slave applications as well.
mlx80002/mlx80004 enhanced universal dual/quad lin transceiver datasheet revision 021 C sept 2016 page 3 of 38 4. table of contents 1. features and benefits ................................ ................................ ................................ ................................ ................... 1 2. ordering information ................................ ................................ ................................ ................................ ................... 1 3. gen eral description ................................ ................................ ................................ ................................ ..................... 2 4. table of contents ................................ ................................ ................................ ................................ ......................... 3 5. block diagram ................................ ................................ ................................ ................................ .............................. 5 6. pin description ................................ ................................ ................................ ................................ ............................. 6 7. electrical specification ................................ ................................ ................................ ................................ .................. 7 7. 1 operating conditions ................................ ................................ ................................ ................................ ................................ ..... 7 7.2 absolute maximum ratings ................................ ................................ ................................ ................................ ........................... 8 7.3 static characteristics ................................ ................................ ................................ ................................ ................................ ...... 9 7. 4 dynamic characteristics ................................ ................................ ................................ ................................ ............................... 12 7.4.1 duty cycle calculation ................................ ................................ ................................ ................................ ..................... 13 8. functional description ................................ ................................ ................................ ................................ ............... 15 8.1 operating modes ................................ ................................ ................................ ................................ ................................ .......... 16 8.2 initialization and standby mode ................................ ................................ ................................ ................................ .................. 16 8.3 active modes ................................ ................................ ................................ ................................ ................................ ................ 16 8.3.1 high speed mode ................................ ................................ ................................ ................................ ............................. 17 8.3.2 low speed mode ................................ ................................ ................................ ................................ .............................. 17 8.3.3 no rmal speed mode ................................ ................................ ................................ ................................ ........................ 17 8.4 sleep mode ................................ ................................ ................................ ................................ ................................ ................... 17 8.5 wake up ................................ ................................ ................................ ................................ ................................ ........................ 18 8.6 wake up sour ce recognition ................................ ................................ ................................ ................................ ...................... 18 8.7 master / slave configuration ................................ ................................ ................................ ................................ ....................... 21 9. fail - safe features ................................ ................................ ................................ ................................ ....................... 22 9.1 loss of battery ................................ ................................ ................................ ................................ ................................ .............. 22 9.2 loss of ground ................................ ................................ ................................ ................................ ................................ .............. 22 9.3 short circuit to battery ................................ ................................ ................................ ................................ ................................ . 22 9.4 ground shift and short circuit to ground ................................ ................................ ................................ ................................ .... 22 9.5 thermal overload ................................ ................................ ................................ ................................ ................................ ......... 22 9.6 unde rvoltage lock out ................................ ................................ ................................ ................................ ................................ .. 22 9.7 open circuit protection ................................ ................................ ................................ ................................ ............................... 22 9.8 txdx faulty start protection ................................ ................................ ................................ ................................ ......................... 23 9.9 rxdx dominant time - out ................................ ................................ ................................ ................................ .............................. 23 9. 10 txdx dominant time - out ................................ ................................ ................................ ................................ .............................. 23 10. application example ................................ ................................ ................................ ................................ ............... 24 10.1 enhanced master mode ................................ ................................ ................................ ................................ ............................... 24 10 .2 standard transceiver mode ................................ ................................ ................................ ................................ ......................... 25
mlx80002/mlx80004 enhanced universal dual/quad lin transceiver datasheet revision 021 C sept 2016 page 4 of 38 10.3 application circuitry for emc ................................ ................................ ................................ ................................ ...................... 26 10.3.1 external circuitry on supply lines ................................ ................................ ................................ ............................... 27 10.3.2 external circuitry on lin lines ................................ ................................ ................................ ................................ ..... 27 10.3.3 external circuitry on signal lines ................................ ................................ ................................ ................................ . 27 11. mechanical specification qfn24 ................................ ................................ ................................ ............................ 28 12. package marking information ................................ ................................ ................................ ................................ . 29 13. tape and reel specification ................................ ................................ ................................ ................................ .... 30 14. esd and emc ................................ ................................ ................................ ................................ .......................... 33 14.1 automotive qualification test pulses ................................ ................................ ................................ ................................ .......... 33 14.2 test pulses on supply lines ................................ ................................ ................................ ................................ ......................... 33 14.3 test pulses on pin lin ................................ ................................ ................................ ................................ ................................ ... 34 14.4 test pulses on signal lines ................................ ................................ ................................ ................................ ............................ 34 14.5 test circuitry for automotive transients ................................ ................................ ................................ ................................ ...... 35 14.6 emc test pulse definition ................................ ................................ ................................ ................................ ............................ 36 15. standard information regarding manufacturability of melexis products with different soldering processes ........... 37 16. disclaimer ................................ ................................ ................................ ................................ .............................. 38
mlx80002/mlx80004 enhanced universal dual/quad lin transceiver datasheet revision 021 C sept 2016 page 5 of 38 5. block diagram figure 1 : block diagram mlx80004 /2. v s m o d e 0 l i n 1 i n h v s m o n i t o r / p o r m o d e c o n t r o l s l e e p t i m e r r x d x t i m e o u t t x d x t i m e o u t 3 . 3 v s u p p l y t e m p . p r o t e c t i o n l i n 2 l i n 4 l i n 3 b i a s s l e w r a t e c a l i b r a t i o n & c o n t r o l m a s t e r p u l l u p 1 k r e c - f i l t e r w a k e - f i l t e r r x d 1 r e c e i v e r d r i v e r c o n t r o l t s d t x d 1 t x t o f i l t e r t x d 2 r x d 2 t x d 3 r x d 3 t x d 4 r x d 4 c h a n n e l 3 c h a n n e l 4 m o d e 1 v s p 1 p 2 p 3 f u s e f u s e f u s e p 0 f u s e w a k e - u p c o n t r o l r c o d i s _ m a s w a k e l o c a l w u 3 0 k v s 1 k r e c - f i l t e r w a k e - f i l t e r r e c e i v e r d r i v e r c o n t r o l t s d t x t o f i l t e r 3 0 k v s m l x 8 0 0 0 4 m l x 8 0 0 0 2 5 0 u a
mlx80002/mlx80004 enhanced universal dual/quad lin transceiver datasheet revision 021 C sept 2016 page 6 of 38 6. pin description figure 2 : pinout mlx80004 qfn24 package figure 3 : pinout mlx80002 qfn24 package table 1 : pin list pin mlx80004 mlx80002 i/o - type description 1 rxd1 o receive data lin ch1, open drain 2 txd1 i transmit data lin ch1 (+ local wu - flag) 3 mode0 i operating mode selection input 1 4 mode1 i operating mode selection input 2 5 txd4 n.c. i transmit data lin ch4 6 rxd4 n.c. o receive data lin ch4, open drain 7 dis_mas i disable integrated master resistor 8 n.c. 9 lin4 n.c. i/o lin bus ch4 10 gndl g ground lin 11 lin3 n.c. i/o lin bus ch3 12 wake i local wake up input, low active 13 rxd3 n.c. o receive data lin ch3, open drain 14 txd3 n.c. i transmit data lin ch3 15 gnd g ground 16 txd2 i transmit data lin ch2 17 rxd2 o receive data lin ch2, open drain 18 n.c. 19 inh o hv high side control pin 20 vs p battery voltage 21 lin2 i/o lin bus ch2 22 gndl g ground lin 23 lin1 i/o lin bus ch1 24 n.c. epa d gnd / gndl g exposed pad of package (grounded heatsink) 1 1 for enhanced thermal and electrical performance, the exposed pad of the qfn package should be soldered to the board ground plane (and not to any other voltage level).
mlx80002/mlx80004 enhanced universal dual/quad lin transceiver datasheet revision 021 C sept 2016 page 7 of 38 7. electrical specification all voltages are referenced to ground (gnd). positive currents flow into the ic. the absolute maximum ratings (in accordance with iec 60 134) given in the table below are limit ing values that do not lead to a permanent damage of the device but exceeding any of these limits may do so. long term exposure to limiting values may a ffect the reliability of the device. 7.1. operating conditions table 2 : operating conditions nr. parameter symbol min max unit remark 101 battery supply voltage [1] [2 ] v s 5 27 v 102 extended battery supply voltage vs_non_op 5 40 v parameter deviations allowed 103 operating ambient temperature t amb - 40 +125 c 104 voltage on low voltage i/os (rxdx, txdx, modex rxdx, txdx, modex - 0.3 5.5 v [1] vs is the ic supply voltage including voltage drop of reverse battery protection diode, v drop = 0.4 to 1v, [2] operating voltage range of the lin2.x /sae j2602 plug & play specification is 7v18v
mlx80002/mlx80004 enhanced universal dual/quad lin transceiver datasheet revision 021 C sept 2016 page 8 of 3 8 7.2. absolute maximum ratings table 3 : absolute maximum ratings nr. parameter symbol condition min max unit 201 battery supply voltage v s respective to gnd - 0.3 40 v 202 transients at battery supply voltage v vs .tr1 iso 7637/2 pulse 1 [1] - 100 v 203 transients at battery supply voltage v vs .tr 2 iso 7637/2 pulse 2 [1] 75 v 204 transients at high voltage signal pins v lin ..tr 1 iso 7637/3 pulses 1 [2] - 30 v 205 transients at high voltage signal pins v lin ..tr 2 iso 7637/3 pulses 2 [2] 30 v 206 transients at high voltage signal and power supply pins v hv ..tr 3 iso 7637/2 pulses 3a, 3b [3] - 150 1 00 v 207 dc voltage lin x v lin_dc respective to gnd and v s loss of ground( v gnd =v s ) - 20 - 30 40 40 v 208 dc voltage wake v wake _dc respective to gnd and v s loss of ground( v gnd =v s ) - 20 - 30 40 40 v 209 dc voltage inh, dis _ m as v inh_dc v dismas_dc - 0.3 v s + 0.3 v 210 dc voltage low voltage i/os (rxdx,txdx,modex) v lv_dc - 0.3 7 v 211 esd voltage , iec 61000 - 4 - 2 [4] v esd pin lin, vs, wake - 10 10 kv 212 esd voltage , hbm (cdf - aec - q100 - 002) v esd pin lin, v s, wake, inh v s gnd - 8 8 kv all other pins - 3 3 kv 213 esd voltage , cdm ( cdf - aec - q100 - 011 ) v esd - 1000 1000 v 214 maximum latch - up free current at any pin i latch - 500 500 ma 215 thermal impedance ? ja jedec 1s2p board 50 k/w 216 storage temperature t stg - 55 150 c 217 junction temperature t vj - 40 150 c [1] iso 7637 /2 test pulses are applied to vs via a reverse polarity diode and > 10 uf blocking capacitor. [2] iso 7637 /3 test pulses are applied to lin via a coupling capacitance of 1 00 nf. [3] iso 7637 /3 test pulses are applied to lin via a coupling capacitance of 1nf. iso 7637 /2 test pulses are applied to vs via a reverse polarity diode and > 10 uf blocking capacitor [4] iec 61000 - 4 - 2 validated by external lab during product qualification (see application examples)
mlx80002/mlx80004 enhanced universal dual/quad lin transceiver datasheet revision 021 C sept 2016 page 9 of 38 7.3. static characteristics table 4 : static characteristics unless otherwise specified all values in the following tables are valid for v s = 5 to 27v and t j = - 40 to 150c. all voltages are referenced to gro und (gnd), positive currents flow into the ic. nr. parameter symbol condition min typ max unit pin vs 301 undervoltage lockout v s_uv 2.4 4.8 v 302 undervoltage lockout hysteresis [1] v s_uv_hys 0.1 0.3 0.7 v 303 supply current, sleep mode i ssl v m0dex = 0v, tj 85c v wake = v linx = v s 14v 9 15 a v m0dex = 0v, tj 125c v wake = v linx = v s 18 v 20 a 3 04 supply current standby mode i sby v m0dex = 0v, after por or wu 1 00 2 00 4 00 a 305 supply current active mode , dominant standard transceiver mode i sd_slave v m0dex = 5v,v txd 1 - 4 = 0v dis_mas = vs (80004) 12 15 ma v m0dex = 5v,v txd 1 - 2 = 0v dis_mas = vs (80002) 7 9 306 supply current active mode , dominant enhanced master mode i sd_master v m0 dex = 5v,v txd 1 - 4 = 0v dis_mas = 0v (80004) 100 12 5 ma v m0 dex = 5v,v txd 1 - 2 = 0v dis_mas = 0v (80002) 50 65 307 supply current active mode , recessive i sr v m0 dex = 5v,v txd 1 - 4 = 5v 3 5 ma pin lin x C transmitter 310 transmitter internal capacitance [1] c lin capacitance on pins linx to gnd 30 40 pf 311 short circuit bus current i bus_lim v lin = v s , v m0dex = 5v,v txdx = 0v 40 100 200 ma 312 pull up resistance bus , normal & standby mode r slave v dis_mas = v s 20 30 60 k? 313 pull up resistance bus , normal & standby mode r master v dis_mas = 0v 900 1000 1100 ? 314 pull up current bus , sleep mode i slave_sleep v lin x = 0 v , v s = 12v, v m0dex = 0 v,v txd x = 5v - 100 - 60 - 20 a 315 voltage drop at int . diode in pull up path r slave [1] v serdiode 0.4 1 v 316 receiver dominant input leakage current including pull up resistor i bus_pas_dom v lin x =0v, v s =12v, v m0dex = 5v,v txdx = 5v , v dis_mas = v s - 400 a 317 receiver recessive input leakage current i bus_pas_rec v lin x =18v, v s =5v, v m0dex = 5v,v txd x = 5v , tamb<125c 20 a 318 bus reverse current loss of battery [2] i bus_no_bat v s = 0v, 0v < v lin x < 18v tamb<125c 20 a 319 bus current during loss of g round [2] i bus_no_gnd v s = v gnd = 12v, 0 < v lin x < 18v - 10 50 a 320 transmitter dominant voltage [2] vol bus rload = 500 ? , v s = 5 v 0 1.2 v rload = 500 ? , v s >= 7 v 0 0.2v s 321 transmitter recessive voltage [2] voh bus v m0dex = 0/5v,v txd x = 5v 0.8 v s 1v s v
mlx80002/mlx80004 enhanced universal dual/quad lin transceiver datasheet revision 021 C sept 2016 page 10 of 38 nr. parameter symbol condition min typ max unit pin linx C receiver 322 receiver dominant voltage v busdom 0.4 v s v 323 receiver recessive voltage v busrec 0.6 v s v 324 center point of receiver threshold v bus_cnt v bus _cnt = ( v busdom + v busrec )/2 0.475 v s 0.5 v s 0.525 v s v 325 receiver hysteresis v hys v hys = ( v busrec C v busdom ) 0.175 v s v pin mode0/1 , txd 2/ 3/4 331 high level input voltage v ih_ xx rising edge 2 v 332 low level input voltage v il_ xx falling edge 0.8 v 333 pull down resistor r pd_ xx v ih_ xx = 5v 200 350 600 k ? 334 leakage current i leak_ xx v il_ xx = 0v - 5 5 a pin txd 1 341 high level input voltage v ih_txd 1 rising edge 2 v 342 low level input voltage v il_txd 1 falling edge 0.8 v 343 pull down resistor r pd_txd 1 v txd 1 = 5v 200 350 600 k ? 344 low level output voltage v ol_txd 1 i txd 1 = 2ma local wu flag 0.6 v 345 leakage current i leak_txd 1 v txd 1 = 0v - 5 5 a pin rxd x 351 low level output voltage v ol_rxd x i rxd x = 2ma 0.6 v 352 leakage current high i leak h _rxd x v rxd x = 5v,v txd x = 5v, v m0/1 = 5v - 5 5 a 353 leakage current low i leak l _rxd x v rxd x = 0v,v txd x = 5v, v m0dex = 5v - 5 5 a pin inh 361 on resistance inh r on_inh v s =12v , t j 125 c 20 50 ? 362 leakage current inh high i leak h _ inh v m0dex = 0v ,v inh = 27v - 5 5 a 363 leakage current inh low i leak l _ inh v m0dex = v inh = 0v , - 5 5 a pin wake 371 high level input voltage v ih_ wake sleep mode v s - 1v v 372 low level input voltage v il_ wake sleep mode v s - 3.3v v 373 pull up current wake i wake_pu v wake = 0 - 30 - 10 - 1 a 374 leakage current wake high i wake_lk v wake = v s =27v - 5 5 a
mlx80002/mlx80004 enhanced universal dual/quad lin transceiver datasheet revision 021 C sept 2016 page 11 of 38 nr. parameter symbol condition min typ max unit pin dis_mas 381 high level input voltage v ih_ dis_mas active modes 4 v s +0 .3v v 382 low level input voltage v il_ dis_mas active modes 1.9 v 383 pull down current dis_mas i dis_mas _p d active modes 50 60 a 384 leakage current dis_mas_low i dis_mas _lk l v dis_mas = 0v - 5 5 a 385 leakage current dis_mas_high i dis_mas _lk h v dis_mas = 27v, sleep mode - 5 5 a thermal protection 391 thermal shutdown [1] t sd 155 170 19 0 c 392 thermal hysteresis [1] t hys 10 30 c [1] no production test, guaranteed by design and qualification [2] in accordance to sae j2602
mlx80002/mlx80004 enhanced universal dual/quad lin transceiver datasheet revision 021 C sept 2016 page 12 of 38 7.4. dynamic characteristics table 5 : dynamic characteristics unless otherwise specified all values in the following table are valid for v s = 5 to 27v and t j = - 40 to 150 o c. nr. parameter symbol condition min typ max unit 401 propagation delay receiver [1] t rx _pdf c rxd =25pf falling edge 6 s 402 propagation delay receiver [1] t rx _pdr c rxd =25pf rising edge 6 s 403 propagation delay receiver symmetry t rx _sym calculate t rx _pdf - t rx _pdr - 2 2 s 404 receiver debounce time [2] t rx _deb lin rising & falling edge 0 .5 4 s 411 lin duty cycle 1 [2 ] [ 3 ] [5] d1 20kbps operation , normal mode vs = 7 to 18 v 0.396 412 lin duty cycle 2 [2 ] [ 3 ] [5] d2 20kbps operation , normal mode vs = 7 to 18v 0.581 413 lin duty cycle 3 [ 2 ] [ 3 ] [5] d3 10.4kbs operation , low speed mode vs = 7 to 18v 0.417 414 lin duty cycle 4 [ 2 ] [ 3 ] [5] d4 10.4kbs operation , low speed mode vs = 7 to 18v 0.590 415 t rec ( max ) C t dom ( min ) [4 ] [5] t3 10.4kbs operation , low speed mode 15.9 s 416 t dom ( max ) C t rec ( min ) [4 ] [5] t4 10.4kbs ope ration , low speed mode 17.28 s 421 remote wake - up filter time t wu x_remote sleep mode, lin dominant time before rising edge 30 150 s 422 local wake - up filter time t wu _local sleep mode, wake falling edge 10 50 s 431 delay from standby to sleep mode t dsleep v modex = 0 1 50 500 ms 432 t xd x dominant time out time t t xd x _to active modes , v txd x = 0 27 6 0 ms 433 r xd x dominant time out time t r xd x _to active modes , v linx = 0 , v dis_mas = 0 27 6 0 ms 441 modex C debounce time t mode _deb active ? > sleep mode transitions 1 2 5 s 442 dis_mas C debounce time t dis_mas _deb master ? > slave transitions 1 2 5 s [1] this parameter is tested by applying a square wave signal to the lin. the minimum slew rate for the lin rising and falling edges is 50v/us [2] see figure 4 C lin timing diagram [3] s tandard loads for duty cycle measurements are 1k ? /1nf , 660 ? /6.8nf, 500 ? /10nf, internal master termination disabled [4] i n accordance to sae j2602 , see figure 5 [5] for supply voltage ranges vs=57v and vs=1827v parametric deviations are possible
mlx80002/mlx80004 enhanced universal dual/quad lin transceiver datasheet revision 021 C sept 2016 page 13 of 38 7.4.1. duty cycle calculation figure 4 : lin timing diagram (reference lin2.1 specification ) figure 4 : lin timing diagram, relation between propagation delay and duty cycle (reference sae j2602 specification )
mlx80002/mlx80004 enhanced universal dual/quad lin transceiver datasheet revision 021 C sept 2016 page 14 of 38 as shown in figure 4 , both worst case duty cycles can be calculated as follows : d wc1 = t bus_rec(min) / (2 t bit ) d wc2 = t bus_rec(max) / ( 2 t b it ) thresholds for duty cycle calculation for the plug & play specification in accordance to lin2.0 / sae j2602 : baud rate 20kbd 10.4kbd t bit 50s 96s d wc1 d1 d3 d wc 2 d2 d4 th rec(max) 0.744 v s_tx 0.778 v s_tx th dom (max) 0.581 v s_tx 0.616 v s_tx th rec(min ) 0.422 v s_tx 0.389 v s_tx th dom(min ) 0.284 v s_tx 0.251 v s_tx table 6 : data transmission rates
mlx80002/mlx80004 enhanced universal dual/quad lin transceiver datasheet revision 021 C sept 2016 page 15 of 38 8. functional description the mlx80004/2 is the physical layer interface between the master/slave microcontroller and the single wire lin bus network. figure 5 : state diagram of the mlx80004/2
mlx80002/mlx80004 enhanced universal dual/quad lin transceiver datasheet revision 021 C sept 2016 page 16 of 38 8.1. operating modes table 7 : operating modes mode mode0 mode1 txdx rxdx inh lin transceiver standby 0 0 weak pulldown/ active low [1] floating/ active low [2] vs off active 1 1 0 1 0 1 weak pulldown/ input for transmit data stream output for lin data stream vs on [3] [4] [5] sleep 0 0 weak pull down floating floating off [1] indicates the wake up flag in case of local wake up [2] after power on rxdx is floating. if any wake up(local or remote) occurs it will be indicated by active low [3] active low interrupt at pin rxd will be removed when entering normal mode [4] wake up source flag at pin txd1 will be removed when entering normal mode [5] active mode s will be entered by a low - > high transition on pin modex . when recessive level (high) on pin txd x is present the transmit path will be enabled 8.2. initialization and standby mode when the battery supply voltage vs exceeds the specified threshold v s_uv , the mlx80 004/2 automatically ente rs an intermediate standby mode. the inh output becomes high (v s) and can be used for a battery driven interrupt or to switch on an external ecu C voltage regulator. the pins rxdx are floating and the integrated master (slave) pull up resistor with decoupling diode pulls the pin lin. the transmitter and the receiver are disabled. if no mode change occurs to any active mode via a mode0/1 low to high transition within the time stated (typically 350ms), the ic enters the most power saving sleep mode and the inh output will become floating (logic 0). furthermore the standby mode will be entered after a valid local or remote wake up event, when the mlx80004/2 is in sleep mode. the entering of the standby mode after wake up will be indicated by an active low interrupt on pin rxdx. the mlx80004/2 enters the standby mode as well in case of a battery under - voltage condition. that happens while being in sleep mode or any active mode. 8.3. active mode s by entering the active modes the mlx80004/2 can be used as interface between the single wire lin bus and the microcontroller. the incomin g bus traffic is detected by the receiver and transferred via the rxdx output pin to the microcontroller. ( see figure 4 , lin timing diagram) the active modes can be entered being in sleep or standby mode, when the pin(s) mode0/1 are driven high.
mlx80002/mlx80004 enhanced universal dual/quad lin transceiver datasheet revision 021 C sept 2016 page 17 of 38 mode0 mode1 mode l l sleep mode h l high speed mode (slew rate control disabled) l h low speed mode h h normal mode table 8 : mode selection table 8.3.1. high speed mode this mode allows high speed data download up to 100kbit/s. th e slew rate control is disabled. the falling edge is the active driven edge, the speed of the rising edge is determined by the network time constant. 8.3.2. low speed mode this mode is the recommended operating mode for j2602 applications with a maximum baud rate of 10.4kbd . the slew rate contr ol of any channel is optimized for minimum radiated noise, especially in the am band. 8.3.3. normal speed mode transmission bit rate in normal mode is up to 20kbps. the slew rate control of any channel is optimized for maximum allowed bit rate in t he lin specifi cation package 2.x . 8.4. sleep mode the most power saving mode of the mlx80004/2 is the sleep mode. the mode change into sleep mode is possible regardless of the voltage levels on the linx bus, pins wake or txdx. the mlx80004/2 offers two procedures to enter the sleep mode: ? the sleep mode will be entered if both the pins mode0 and mode1 are being driven low for longer than the specified filter time ( t mode _deb ) when in active modes. ? if the mlx80004/2 is in standby mode after power - on or wake - up, a sleep coun ter is started and switches the transceiver into sleep mode after the specified time (typ. 350ms) if the microcontroller of the ecu will not confirm the active operation by setting mode0/1 pins to logic high. this feature allows faulty blocked lin nodes t o reach the most power saving sleep mode anyway. being in sleep mode the inh pin becomes floating and can be used to switch off the ecu voltage regulator in order to minimize the current consumption of the complete lin node (preferred feature in slave applications). the transmitters are disabled and the pins rxdx are disconnected from the receive path and become floating. the master(slave) termination resistor (lin pull up resistor with decoupling diode between pins lin and vs) is disconnected, only a weak lin pull up current of typically 50ua is applied to the linx bus (see chapter 9 fail - safe features )
mlx80002/mlx80004 enhanced universal dual/quad lin transceiver datasheet revision 021 C sept 2016 page 18 of 38 8.5. wake up when in sleep mode the mlx80004/2 offers three wake - up procedures: ? in applications with continuously powered ecu a wake up via mode transition to active modes is possible by setti ng the modex pins to high level. (see chapter 4.3 active modes) ? remote wake - up via linx bus request after a falling edge on the linx bus followed by a dominant voltage level for longer than the specified value( t wu _remote ) and a rising edge on pin linx wil l cause a remote wake up (see figure 6 at page 19 ) ? local wake - up via a ne gative edge on pin wake a negative edge on the pin wake and a dominant voltage level for longer than the specified time ( t wu _local ) will cause a local wake - up. the current for an external switch has to be provided by an external pull up resistor r wk . for a reverse current limitation in case of a closed external switch and a negative ground shift or an ecu loss of ground a protection resistor r wk_prot between pin wake and the switch is recommended. (see figure 7 at page 20 ) the pin wake provides a weak pull up current towards the battery voltage that provides a high level on the p in in case of open circuit failures or if no local wake up feature is required. in such applications it is recommended to connect the pin wake to pin vs via a resistor of 10k ohms . 8.6. wake up source recognition the device can distinguish between a local wake - up event (pin wake) and a remote wake - up event in dependence of the requesting linx bus. local wake u p in case of a local wakeup via wake pin, the wake up request is indicated by an active low on pin rxd1. the wake - up source flag is set and is indicated by an active low on pin txd1. the wake - up source flag can be read if an external pull up resistor at txd1 towards the microcontroller supply voltage has been added and the mlx80004/2 is still in standby mode : when the microcontroller confirms an active mode operation by setting the pin mode0/1 to high, both the wake - up request on pin rxd1 as well as the wake - up source flag on pin txd1 are reset immediately. remote wake up in case of a remote wake - up via a linx bus, the source of the wake - up request will be indicated by the rxdx pin that belongs to the linx pin. (example: low level on rxd4 and floating rxd1 - 3 indicate a wake - up request on lin4). the wake up source flag at txd1 remains floating. this allows f ollowing the wake - up request of the requesting lin bus while remaining the other lin bus channels in recessive mode (no wake up occurs in these lin networks). after a mode transition into any active mode by setting the pin mode0/1 to high, the active low wake - up request on pin rxdx is reset immediately. if the device is not set into an active mode after a wake up request (either local or remote) then it will return into sleep mode after t dsleep .
mlx80002/mlx80004 enhanced universal dual/quad lin transceiver datasheet revision 021 C sept 2016 page 19 of 38 figure 6 : remote wake up and w ake - up source recognition
mlx80002/mlx80004 enhanced universal dual/quad lin transceiver datasheet revision 021 C sept 2016 page 20 of 38 figure 7 : local wake up and wake - up source recognition
mlx80002/mlx80004 enhanced universal dual/quad lin transceiver datasheet revision 021 C sept 2016 page 21 of 38 8.7. master / slave configuration the target applications of the mlx80004/2 are bcm master modules with multiple lin channels. in order to be able to us e the same module for a wide variety of applications with different stages of extension, a space efficient and cost effective adap tation on the number of lin channels is desired. the mlx80004/2 device family offers the combination of quad and dual channel lin transceiver within the same advanced package and a compatible foot print. by the integration of the lin master - termination ( decoupling diode and 1k resistor) the external circ uitry can be minimized in terms of space as well as bom ( bill of material). the rxd time - out feature allows the handling of a lin short to ground failure without software s upport by the microcontroller. this application mode is called enhanced master mode, compatible to the functionality of the quad C lin transceiver mlx80001. in case of different bcm requirements it may happen that the external master termination is desired only. to cover these applications the pin dis_mas has been introduced: dis_mas mode lin termination supported fail safe features gnd enhanced master mode active mode : diode & 1k ? sleep mode :diode & 60a ? rxdx time - out, independent disconnect of master termination in case of linx short to ground ? txdx time - out, independent disable of faulty dominant blocked transmit path vs standard transceiver mode active mode : diode & 30k ? sleep mode :diode & 60a ? txdx time - out, independent disable of faulty dominant blocked transmit path table 9 : time out modes in case of externally mounted master termination (standard transceiver mode), the handling of a lin short to ground is not possible. by using the standard transceiver mode, the mlx80004/2 can be used in slave appl ications as well. to pull the pin dis_mas to high even in case the external ecu regulator is switched off in sleep mode . the pin shall be connected to vs via an external resistor. (see figure 8 at page 24 , application example) in the standard transceiver mode, only the txdx time - out feature is enabled.
mlx80002/mlx80004 enhanced universal dual/quad lin transceiver datasheet revision 021 C sept 2016 page 22 of 38 9. fail - safe features 9.1. loss of battery if the ecu is disconnected from the battery, the bus pin is in high impedance state. there is no impact to the bus traffic and to the ecu itself. reverse current is limited to < 20 a 9.2. loss of ground in case o f an interrupted ecu ground connection there is no influence to the bus line s . the current from the ecu to the linx pins is limited by the weak pull up current of the pin linx, the integrated master termination (dis_mas = gnd) as well as the integrated sla ve termination (dis_mas = v s ) is disconnected in order to fulfill the sae j2602 requirements for the loss of ground current (<100 a @12v). 9.3. short circuit to battery the transmitter output current s are limited to the specified value in case of short circuit to battery in order to prevent high current densities and thermal hot spots in the lin drivers. in dependency of the ambient temperature as well as the battery voltage the junction temperature can ex ceed the specified value and a thermal overload condition occurs (see chapter 4.5) 9.4. ground shift and s hort circuit to ground if the lin bus wiring is shorted to negative shifted ground levels, there is no current flow from the ecu ground to the lin bus and no distortion of the bus traffic occurs . a lin bus short to ground condition can cause an undesired current flow. the mlx80004/ mlx80002 offers different opportunities to handle the lin short to ground, see chapter 8.7. 9.5. thermal overload the mlx80004 and th e mlx80002 is protected against thermal overloads. if the chip junction temperature exceeds the specified value, all transmitter s are disabled and the master termination is switched off in order to reduce the power consumption . the receiver is still worki ng during the thermal shutd own state . t he pins rxdx indicate the voltage level from the linx pins also if the circuit is in thermal shut down . the circuit returns automatically to the normal mode after thermal recovery. 9.6. undervoltage lock out if the battery supply voltage is missing or decreased under the specified value (v s_uv ), all transmitter s are disabled to prevent undefined bus traffic. while in sleep mode, the mlx80004/2 enters the standby mode if vs drops below the internal power on reset threshold (v inh = v s ) . 9.7. open circuit protection ? the pins txdx provide a weak pull down. the transmitter cannot be enabled . ? the pin s mode0/mode1 provide a weak pull down to prevent undefined active mode transitions. ? if the battery supply voltage is disconnected, the pins rxdx are floating ? the pin wake provides a weak pull up current towards supply voltage vs to prevent local wake - up requests. ? the pin dis_mas provides a pull down current of 50ua .
mlx80002/mlx80004 enhanced universal dual/quad lin transceiver datasheet revision 021 C sept 2016 page 23 of 38 9.8. txdx faulty start p rotection after power - on or wake - up a dominant level on txdx will not lead to a dominant linx level if the ic is being switched into an active mode. only in case of recessive level before applying the first dominant level the transmit path will be enabled. 9.9. rxdx dominant time - out a dominant linx level longer than the specified time (typ. 40ms) indicates a faulty blocked bus . the master pull - up resistor of the affected lin channel will be disconnected from the network in order to prevent thermal overload con ditions or failure currents from the battery without any intervention from the micro controller . only a weak pull - up current (typ.60ua) is applied on the lin bus. the rxd time - out will be reset with the next dominant - > recessive transition on the lin bus i f the failure disappears . the rxdx time - out is only active in the enhanced master mode, while the master termination is enabled. 9.10. txdx dominant time - out in case of a faulty blocked permanent dominant level on pin txdx the transmit path will be disabled after the specified time t t xd x _to (typ. 40ms). the data transmission is released again as soon as the failure disappears by the next rising edge of txdx. the txdx time - out is active in both, the standard transceiver and enhanced master mode .
mlx80002/mlx80004 enhanced universal dual/quad lin transceiver datasheet revision 021 C sept 2016 page 24 of 38 10. application example 10.1. enhanced master mode figure 8 : application example using enhanced master mode with minimized external components and lin short to gnd feature . note: all pins of mlx80004/mlx80002 with ?n.c. are internally not connected. 1 0 0 n f m l x 8 0 0 0 4 r x d 1 v b a t v o l t a g e r e g u l a t o r + 5 v v b a t _ e c u 2 2 u f 1 n 4 0 0 1 p e c u c o n n e c t o r l i n 1 t x d 1 v s c a r b a t t e r y c l 3 0 m a s t e r e c u l i n x n e t w o r k m o d e 0 m o d e 1 i n h c o n t r o l l i n 1 0 k 1 n f l i n 3 l i n 2 l i n 4 d i s _ m a s w a k e r x d 2 r x d 3 r x d 4 t x d 2 t x d 3 t x d 4 1 0 0 n f m l x 8 0 0 0 2 r x d 1 v b a t v o l t a g e r e g u l a t o r + 5 v v b a t _ e c u 2 2 u f 1 n 4 0 0 1 p e c u c o n n e c t o r l i n 1 t x d 1 v s s l a v e e c u m o d e 0 m o d e 1 i n h i n h c o n t r o l l i n 1 0 k 1 8 0 p l i n 2 d i s _ m a s w a k e r x d 2 t x d 2 1 0 k 4 , 7 k 4 , 7 k
mlx80002/mlx80004 enhanced universal dual/quad lin transceiver datasheet revision 021 C sept 2016 page 25 of 38 10.2. standard transceiver mode figure 9 : application example using standard transceiver mode without lin short to gnd feature . note: all pins of mlx80004/mlx80002 with ?n.c. are internally not connected. 1 0 0 n f m l x 8 0 0 0 4 r x d 1 v b a t v o l t a g e r e g u l a t o r + 5 v v b a t _ e c u 2 2 u f 1 n 4 0 0 1 p e c u c o n n e c t o r l i n 1 t x d 1 v s c a r b a t t e r y c l 3 0 m a s t e r e c u l i n x n e t w o r k m o d e 0 m o d e 1 i n h c o n t r o l l i n 1 0 k 1 n f l i n 3 l i n 2 l i n 4 d i s _ m a s w a k e r x d 2 r x d 3 r x d 4 t x d 2 t x d 3 t x d 4 1 0 0 n f m l x 8 0 0 2 0 r x d v b a t v o l t a g e r e g u l a t o r + 5 v v b a t _ e c u 2 2 u f 1 n 4 0 0 1 p e c u c o n n e c t o r l i n t x d v s s l a v e e c u e n i n h i n h c o n t r o l l i n 1 0 k 1 8 0 p w a k e 1 0 k 1 k 4 , 7 k 4 , 7 k
mlx80002/mlx80004 enhanced universal dual/quad lin transceiver datasheet revision 021 C sept 2016 page 26 of 38 10.3. application circuitry for emc in order to minimize emc influences, the external application circuitry shall be designed as followed: figure 10 : typical application circuitry for emc v s v s c o n n e c t o r + c 1 1 ) c 2 2 ) c 3 2 ) m l x 8 0 0 0 4 l i n x g n d x l i n c 4 2 ) g n d d 1 2 ) r 1 2 ) d 2 1 ) c 5 1 ) r 2 2 ) w a k e s i g n a l - l i n e 2 ) m a n d a t o r y i m p l e m e n t e d 1 ) o p t i o n a l i m p l e m e n t e d
mlx80002/mlx80004 enhanced universal dual/quad lin transceiver datasheet revision 021 C sept 2016 page 27 of 38 10.3.1. external circuitry on supply lines in order to minimize emc influences, the external application circuitry shall be designed as followed: name mounting min recommended max dim comment c1 recommended - 100 - nf ceramic smd: 10%, 0805, 50v; close to the connector d1 mandatory inverse - polarity protection diode c2 mandatory 1 22 100 f tantal smd: 10%, 7343, 35v c3 mandatory - 100 - nf ceramic smd: 10%, 0805, 50v; close to the pin table 10 : external components on supply lines 10.3.2. external circuitry on lin lines in order to minimize emc influences, the external application circuitry shall be designed as followed: name mounting min recommended max dim comment d2 no - pesd1lin - esd protection diode: sod323 close to the connector; c4 mandatory - 220/1000 - pf ceramic smd: 10%, 0805, 50v; c slave c d2 +c 4 +c ic c slave 250pf/ c master 1nf table 11 : external components on lin lines 10.3.3. external circuitry on signal lines in order to minimize emc influences, the external application circuitry shall be designed as followed: name mounting min recommended max dim comment c5 no 0.1 1 100 nf ceramic smd: 10%, 0805, 50v; r2 mandatory 5k 10k 100k serial resistor: 0805 table 12 : external components on signal lines
mlx80002/mlx80004 enhanced universal dual/quad lin transceiver datasheet revision 021 C sept 2016 page 28 of 38 11. mechanical specification qfn24 the chip will be assembled in a 24pin qfn 4x4 package with wettable flanks . figure 11 : package drawing package jc [c/w] ja [c/w] (jedec 1s0p board) ja [c/w] (jedec 1s2p board) qfn 4x4 16 154 50 table 13 : ? ja values
mlx80002/mlx80004 enhanced universal dual/quad lin transceiver datasheet revision 021 C sept 2016 page 29 of 38 12. package marking information figure 12 : package marking of the mlx 80004 device in qfn24 4x4 smd package 5 - digit type number 5 - digit lot number 4 - digit date code format: yyww design revision 8 0 0 0 4 a 2 3 4 5 d 1 0 2 5 1 2 3 4 5 6 1 8 1 7 1 6 1 5 1 4 1 3 7 8 9 1 0 1 1 1 2 2 4 2 3 2 2 2 1 2 0 1 9
mlx80002/mlx80004 enhanced universal dual/quad lin transceiver datasheet revision 021 C sept 2016 page 30 of 38 13. tape and reel specification note: that the above mentioned labels are just examples which represent the label layout!
mlx80002/mlx80004 enhanced universal dual/quad lin transceiver datasheet revision 021 C sept 2016 page 31 of 38
mlx80002/mlx80004 enhanced universal dual/quad lin transceiver datasheet revision 021 C sept 2016 page 32 of 38
mlx80002/mlx80004 enhanced universal dual/quad lin transceiver datasheet revision 021 C sept 2016 page 33 of 38 14. esd and emc in order to minimize emc influences, the pcb has to be designed according to emc guidelines. the products mlx80004/2 are esd sensitive devices and have to be handled according to the rules in iec61340 - 5 - 2. the products mlx80004/2 are evaluated according aec - q100 - 002 (hbm) and aec - q100 - 0 11 (cdm ). the extended esd /emc tests ( acc. to iec 61000 - 4 - 2, lin conf. test specification package for lin2.1, oem hardware requirements for lin, can and flexray interfaces in automotive applications C audi, bmw, daimler, porsche, volkswagen - rev. 1.3/2012 ) have been tested by external certifi cated test houses. the test reports are available on request. 14.1. automotive qualification test pulses automotive test pulses are applied on the module in the application environment and not on the naked ic. therefore attention must be taken, that only prote cted pins (protection by means of the ic itself or by means of external components) are wired to a module connector. in the recommended application diagrams, the reverse polarity diode together with the capacitors on supply pins, the protection resistors i n several lines and the load dump protected ic itself will protect the module against the below listed automotive test pulses. the exact value of the capacitors for the application has to be figured out during design - in of the product according to the auto motive requirements. for the lin pin the specification lin physical layer spec 2.1 (nov. 24, 2006) is valid. supply pin vs is protected via the reverse polarity diode and the supply capacitors. no damage will occur for defined test pulses. a deviation o f characteristics is allowed during pulse 1 and 2; but the module will recover to the normal function after the pulse without any additional action. during test pulse 3a, 3b, 5 the module will work within characteristic limits. 14.2. test pulses on supply lines parameter symbol min max dim coupling test condition, functional status transient test pulses in accordance to iso7637 - 2 (supply lines) & , vs=13.5v, ta=(23 5)c ? & (document: hardware requirements for lin, can and flexray interfaces in automotive applications ; audi, bmw, daimler, porsche, vw; 2009 - 12 - 02) test pulse #1 vpulse1 - 100 v direct 5000 pulses, functional state c test pulse #2 vpulse2 75 v direct 5000 pulses, functional state a test pulse #3a vpulse3a - 150 v direct 1h,functional state a test pulse #3b vpulse3b 100 v direct 1h,functional state a load dump test pulse in accordance to iso7637 - 2 (supply lines), vs=13.0v, ta=(23 ? 5)c test pulse #5b vpulse5b 65 (+13v (vs)) 87 (+13v (vs)) v direct 1 pulse clamped to 27v (+13v (vs)), (32v (+13v (vs))for applications for north america), functional state c table 14 : test pulses supply line
mlx80002/mlx80004 enhanced universal dual/quad lin transceiver datasheet revision 021 C sept 2016 page 34 of 38 14.3. test pulses on pin lin parameter symbol min max dim coupling test condition, functional status transient test pulses in accordance to iso7637 - 3, vs=13.5v, ta=(23 ? 5)c ? & (document: hardware requirements for lin, can and flexray interfaces in automotive applications ; audi, bmw, daimler, porsche, vw; 2009 - 12 - 02) test pulse dcc slow C vpulse_ slow+ - 100 v direct capacitive coupled: 1nf 1000 pulses, functional state d test pulse dcc slow + vpulse_ slow - 75 v direct capacitive coupled: 1nf 1000 pulses, functional state d test pulse dcc fast a vpulse_ fast_a - 150 v direct capacitive coupled: 100pf 10 min, functional state d test pulse dcc fast b vpulse_ fast_b 100 v direct capacitive coupled: 100pf 10 min, functional state d table 15 : test pulses lin 14.4. test pulses on signal lines parameter symbol min max dim coupling test condition, functional status transient test pulses in accordance to iso7637 - 3 (signal lines). vs=13.5v, ta=(23 5)c test pulse dcc slow C vpulse_ slow+ - 30 - 8 v d irect capacitive coupled: 100nf 1000 pulses, functional state c test pulse dcc slow + vpulse_ slow - +8 +30 v direct capacitive coupled: 100nf 1000 pulses, functional state a test pulse dcc fast a vpulse_ fast_a - 60 - 10 v direct capacitive coupled: 100pf 10 min, functional state a test pulse dcc fast b vpulse_ fast_b 10 40 v direct capacitive coupled: 100pf 10 min, functional state a table 16 : test pulses signal lines description of functional stat e a: all functions of the module are performed as designed during and after the disturbance. b: all functions of the module are performed as designed during the disturbance : one or more functions can violate the specified tolerances. all functions return automatically to within their no rmal limits aft er the disturbance is removed. memory functions shall remain class a. c: a function of the module does not perform as designed during the disturbance but returns automatically to the normal operation after the disturbance is removed. d: a f unction of the module does not perform as designed during the disturbance and does not return automatically to the normal operation after the disturbances is removed. the device needs to be reset by a simple operation/action to return to the specified limi ts/function.
mlx80002/mlx80004 enhanced universal dual/quad lin transceiver datasheet revision 021 C sept 2016 page 35 of 38 14.5. test circuitry for automotive transients figure 13 : test circuit for automotive transients figure 13 shows the general requirement on the test circuitry for applying automotive transient test pulses. in order to represent the most critical network impedance, the linx pins has to be connected via 1kohm / decoupling diode to the schaffner test generator. including the integrated master termination of 1kohm, the minimum network resistance of 500ohm can be simulated by adding an external 1kohm resistor. in slave application mode (dis_mas = vs), t he external coupling has to be applied via 500ohm resistor.
mlx80002/mlx80004 enhanced universal dual/quad lin transceiver datasheet revision 021 C sept 2016 page 36 of 38 14.6. emc test pulse definition em c test pulse shapes (iso7637 - 2 (supply lines)) test pulse 1 ri = 10 ohm test pulse 2 ri = 2 ohm test pulse 3a ri = 50 ohm test pulse 3b ri = 50 ohm test pulse 5 (load dump) ri = 0.54 ohm (clamped to 45v during test) table 17 : test pulses shapes iso7637 - 2 emc test pulse shapes (iso7637 - 3 (non - supply lines)) test pulse dcc slow C ri = 2 ohm test pulse dcc slow + ri = 2 ohm test pulse fast a, dcc ri = 50 ohm test pulse fast b, dcc ri = 50 ohm table 18 : test pulses shapes iso7637 - 3 200 ms < 100 s 2 ms 0.5...5s vpulse1 12 v 0 v t v 10% 90% 1 s t 0 v v 12v 90% 10% vpulse2 200 ms 1 s 50 s 0.5...5s 100 s 10 ms 90 ms v 100 ns 5 ns vpulse3a 10% 90% t 0 v 12v vpulse3a v 0 v 100 s 10 ms 90 ms vpulse3b 10% 90% 100 ns 5 ns 12v t vpulse3b 90% 10% pulse 5 pulse 5 at device 40v td = 40...400ms tr = 0.1...10ms 12v v t vpulse5
mlx80002/mlx80004 enhanced universal dual/quad lin transceiver datasheet revision 021 C sept 2016 page 37 of 38 15. standard information regarding manufacturability of melexis products with different soldering processes our products are classified and qualified regarding soldering technology, solderability and moisture sensitivity level according to following test meth ods: reflow soldering smds ( s urface m ount d evices) ? ipc/jedec j - std - 020 moisture/reflow sensitivity classification for nonhermetic solid state surface mount devices (classification reflow profiles according to table 5 - 2) ? eia/jedec jesd22 - a113 preconditioning of nonhermetic surface mount devices prior to reliability testing (reflow profiles according to table 2) wave soldering smds ( s urface m ount d evices) and thds ( t hrough h ole d evices) ? en60749 - 20 resistance of plastic - encapsulated smds t o combined effect of moisture and soldering heat ? eia/jedec jesd22 - b106 and en60749 - 15 resistance to soldering temperature for through - hole mounted devices iron soldering thds ( t hrough h ole d evices) ? en60749 - 15 resistance to soldering temperature for thro ugh - hole mounted devices solderability smds ( s urface m ount d evices) and thds ( t hrough h ole d evices) ? eia/jedec jesd22 - b102 and en60749 - 21 solderability for all soldering technologies deviating from above mentioned standard conditions (regarding peak t emperature, temperature gradient, temperature profile etc) additional classification and qualification tests have to be agreed upon with melexis. the application of wave soldering for smds is allowed only after consulting melexis regarding assurance of adhesive strength between device and board. melexis recommends reviewing on our web site the general guidelines soldering recommendation ( http://www.melexis.com/quality_soldering.aspx ) as well as trim&form recommendations ( http://www.melexis.com/assets/trim - and - form - recommendations - 5565.aspx ). for wettable flanks packages, please refer to the melexis application note qfn wettable flanks specific handling. melexis is contributing to global environmental conservation by promoting lead free solutions. for more information on qualifications of rohs compliant products (rohs = european directive on the re striction of the use of certain hazardous substances) please visit the quality page on our website: http://www.melexis.com/quality.aspx
mlx80002/mlx80004 enhanced universal dual/quad lin transceiver datasheet revision 021 C sept 2016 page 38 of 38 16. disclaimer devices sold by melexis are covered by the warranty an d patent indemnification provisions appearing in its term of sale. melexis makes no warranty, express, statutory, implied, or by description regarding the information set forth herein or regarding the freedom of the described devices from patent infringeme nt. melexis reserves the right to change specifications and prices at any time and without notice. therefore, prior to designing this product into a system, it is necessary to check with melexis for current information. this product is intended for use in normal commercial applications. applications requiring extended temperature range, unusual environmental requirements, or high reliability applications, such as military, medical life - support or life - sustaining equipment are specifically not recommended wi thout additional processing by melexis for each application. the information furnished by melexis is believed to be correct and accurate. however, melexis shall not be liable to recipient or any third party for any damages, including but not limited to per sonal injury, property damage, loss of profits, loss of use, interrupt of business or indirect, special incidental or consequential damages, of any kind, in connection with or arising out of the furnishing, performance or use of the technical data herein. no obligation or liability to recipient or any third party shall arise or flow out of melexis rendering of technical or other services. ? 2014 melexis nv. all rights reserved. for the latest version of this document, go to our website at www.melexis.com or for additional information contact melexis direct: europe, africa, asia: america: phone: +32 1367 0495 phone: +1 248 306 5400 e - mail: sales_europe@melexis.com e - mail: sales_usa@melexis.com iso/ts 16949 and iso14001 certified

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